Homework
7
(Due
on Nov. 4, 2008)
In this assignment, most of the answers are straight forward
and some of them require reading research literature and writing answers in
your own words. Originality of your answers gets full credit. Originality
points are mentioned explicitly.
- In the class you have
studied various cache optimization techniques. Explain two techniques that
are useful in reducing the conflict misses. (10)
- There are four types of
cache misses; compulsory misses, capacity misses, conflict misses, and
coherence misses. Among these, coherence misses are specific to multicore
processors. How can you avoid/reduce coherence misses? (10) + (5
Originality)
- What are various
challenges and limitations of data prefetching? Provide some suggestions
to deal with those limitations. (15) + (5 Originality)
- Provide pros and cons of
private caches and shared caches. (10)
- Discuss various techniques
used in predicting what to
prefetch. (10)
- Search for IBM Cell
processor’s architecture and provide details of its memory
hierarchy. (10)
- How is the local memory of
each core of a Cell processor different from cache memory? What are its
benefits over cache memory? (10)
- Given the following pseudo
code:
int
array[10000,100000];
for each element array[i][j] {
array[i][j] = array[i][j] * 2;
}
Write two C programs that implement
this algorithm: one should access the elements of the array in row-major order,
and the other should access them in column-major order. Compare the execution
times of the two programs. What does this tell you about the effects of memory
layout on cache performance? (10) +
(5 Originality)