The slide presentation describes a simple CPU connected to a memory; the purpose is to show the sequence of addresses issued by the CPU to execute two instructions. The CPU model is as follows:
The presentation starts with a CPU internal structure that turns out to be unable to execute instructions. Some extra hardware is then added to fix the problem.
This work has been funded by a small grant, part of the Quick Start program at the Illinois Institute of Technology.
The authors are with the Computer Science and Applied Mathematics Department at the Illinois Institute of Technology.